1. Field of the Invention
This invention relates to integrated circuits, and more particularly to a semiconductor test chip.
2. Description of the Prior Art
The current approach to designing a test chip, for example for the purpose of D.C. device parameter extraction, is to provide dedicated contact pads for the terminals of all the various test devices on the chip. Consequently the number of contact pads is proportional to the number of test devices. Furthermore, to access one device, the correct pads have to be accessed using an exterior switch matrix controller. As a result the circuit is complex and the number of devices that can be incorporated limited by the physical size of the contact pads.
An object of the present invention is to alleviate the afore-mentioned disadvantage of the prior art.